In a typical memory circuit, a column of memory cells are connected to a bit line, which is in turn connected to a sense amplifier. When performing a read operation on a target memory cell of the column of memory cells corresponding to a predetermined address, the bit line is charged to a predetermined voltage level (also known as a “precharge phase” of a read operation), and then the memory cell is coupled to the bit line in order to change a voltage level of the bit line in response to the datum stored in the memory cell (also known as an “evaluation phase” of a read operation). The sense amplifier then converts the voltage level on the bit line to either a logic 1 output or a logic 0 output (also known as an “output phase” of a read operation). Therefore, the time for performing a read operation is determined by many factors including, among other things, the time required to charge the bit line to the predetermined voltage level.